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Type of Document Dissertation Author Riedel, Marcus Author's Email Address riedel AT caltech.edu URN etd-05032004-153842 Persistent URL http://resolver.caltech.edu/CaltechETD:etd-05032004-153842 Title Cyclic combinational circuits Degree PhD Option Electrical Engineering Advisory Committee
Advisor Name Title Professor Jehoshua Bruck Committee Chair Professor Alain Martin Committee Member Professor Ali Hajimiri Committee Member Professor Andrew Viterbi Committee Member Professor Erik Winfree Committee Member Professor Yaser Abu-Mostafa Committee Member Keywords
- logic synthesis
- combinational logic
- loops
- combinational circuits
- cycles
- feedback
Date of Defense 2003-11-17 Availability unrestricted Abstract A collection of logic gates forms a combinational circuit if the outputs can be described as Boolean functions of the current input values only. Optimizing combinational circuitry, for instance, by reducing the number of gates (the area) or by reducing the length of the signal paths (the delay), is an overriding concern in the design of digital integrated circuits.
The accepted wisdom is that combinational circuits must have acyclic (i.e., loop-free or feed-forward) topologies. In fact, the idea that "combinational" and "acyclic" are synonymous terms is so thoroughly ingrained that many textbooks provide the latter as a definition of the former. And yet simple examples suggest that this is incorrect. In this dissertation, we advocate the design of cyclic combinational circuits (i.e., circuits with loops or feedback paths). We demonstrate that circuits can be optimized effectively for area and for delay by introducing cycles.
On the theoretical front, we discuss lower bounds and we show that certain cyclic circuits are one-half the size of the best possible equivalent acyclic implementations. On the practical front, we describe an efficient approach for analyzing cyclic circuits, and we provide a general framework for synthesizing such circuits. On trials with industry-accepted benchmark circuits, we obtained significant improvements in area and delay in nearly all cases. Based on these results, we suggest that it is time to re-write the definition: combinational might well mean cyclic.
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28.8 Modem 56K Modem ISDN (64 Kb) ISDN (128 Kb) Higher-speed Access marc.riedel.phd.pdf 2.20 Mb 00:10:09 00:05:13 00:04:34 00:02:17 00:00:11 resume.pdf 9.90 Kb 00:00:02 00:00:01 00:00:01 < 00:00:01 < 00:00:01